(a) Field of the Invention:
The present invention relates to an amplifier with power supply switching, and more particularly to an amplifier of the type described which is arranged to effect switching of the levels of the power supply voltages to be supplied to the amplifying elements of the output stage in accordance with the level of a signal corresponding to an input signal.
(b) Description of the Prior Art:
There is known a power amplifier intended to improve the power efficiency thereof, arranged so that in case the level of an input signal is low, a power supply having a low level of voltage is connected to the output stage of the amplifier, and that in case the level of an input signal is high, the output stage is connected to a power supply having a high level of voltage. For example, FIG. 1 shows an example of such known power amplifier utilizing a single ended push-pull (SEPP) circuit of the balanced power supply type. In the Figure, reference numerals 1 and 2 represent transistors of the output stage which are arranged so that one 1 of the transistors is adapted to be connected to either a dc power supply 4 or to power supplies 3 and 4, whereas the other transistor 2 is adapted to be connected to either a dc power supply 5 or power supplies 5 and 6. In this example, in case the level of an input signal which is applied to an input terminal 7 is low, the transistors 1 and 2 are connected to the dc power supplies 4 and 5, respectively, whereas in case the level of an input signal is high, switching circuits 8 and 9 are both rendered to the conductive state, so that the transistors 1 and 2 are connected to the dc power supplies 3 and 4, and the dc supplies 5 and 6, respectively. The switching circuits 8 and 9 are adapted to be driven by a comparator circuit 11 which is to receive an output of an absolute value circuit 10. More specifically, the absolute value circuit 10 is a circuit intended to seek the absolute value of an output signal derived at an output terminal 13. The level of an output of this absolute value circuit 10 is compared with the level of a reference voltage V.sub.a in the comparator circuit 11, so that the on-off actions of the switching circuits 8 and 9 are controlled by the result of the comparison. This known power amplifier is so arranged that the level of an output signal is detected in place of direct detection of the level of an input signal. Also, a resistor 14 in the cirucitry is a load resistor.
In the known power amplifier having the foregoing circuit arrangement, the timing of switching of the switching circuits 8 and 9 provides problems. More particularly, if the level of the reference voltage V.sub.a is set substantially equal to the level of the voltage of either the dc power supply 4 or 5, there will occur such inconvenience that, when the input terminal 7 is applied with a high level input signal having a quick build-up, the timing of power supply from either the dc power supply 3 or 6 fails to follow the quick variations of the level of the input signal due to the delay of operation of the switching circuits 8 and 9, so that the resulting output signal will become distorted. Also, if the level of the reference voltage V.sub.a is set low to prevent the development of such distortion, there could occur an instance wherein, even when the input signal is of such level that can be covered sufficiently by the dc power supplies 4 and 5, the transistors 1 and 2 are supplied with voltages of a level representing the voltages of these dc power supplies 4 and 5 added with the voltage of the dc power supplies 3 and 6, respectively. For this reason, there arises the problem of an increased power loss and a lowered power efficiency in the transistors 1 and 2.